Thin film semiconductor structures have recently found increasing popularity in industries requiring large active area semiconductor devices, such as the terrestrial photovoltaic, light emitting panel, and liquid crystal display driver fields. All of the above fields may incorporate devices having a photovoltaic cell type structure that generates a photovoltaic effect by generating voltage in response to absorbed light energy.
A typical photovoltaic (PV) cell includes a substrate layer for mounting the cell and two ohmic contacts or conductors for passing current to an external electrical circuit. The cell also includes an individual multi-layer semiconductor cell or several semiconductor cells connected in series. The cells operate by having readily excitable electrons that can be energized by solar energy to higher energy levels, thereby creating positively charged holes and negatively charged electrons at the interface of various semiconductor layers. The creation of these positive and negative charge carriers applies a net voltage across a base electrode layer and a top electrode layer positioned on either side of the semiconductor layer of the PV cell, which can force a current of electricity when the device is connected to a proper electric circuit.
The application of semiconductor devices in industries such as those mentioned above has created a need for semiconductor devices having active area requirements extending up to approximately one square meter. Due to these size requirements, the use of polycrystalline or amorphous thin film semiconductor material layers has become increasingly popular in semiconductor device design, as opposed to known crystalline semiconductor structures, which are both limited in size and expensive to manufacture. However, inherent in such polycrystalline or amorphous thin film layer semiconductor device configurations is the presence of various structural nonuniformities. Where a PV cell structure is used, these structural nonuniformities can cause lateral fluctuations in the electric potential at the surfaces of the various layers of the PV device (areas of low electric resistance are often referred to as shunts) as well as cause forward current leakage paths (often referred to as weak diodes). The structural nonuniformities can result from either defects within various semiconductor layers of the device or from morphological irregularities in the deposition surface of the substrate material. These defects lead to an overall decrease in the efficiency of the semiconductor device.
In order to minimize the negative impact such structural nonuniformities have on the performance of a PV device, there are a number of known treatment or minimization methods that effectively disable the semiconductor defect regions by destroying or isolating the corresponding defect region present in one of the electrode layers of the PV device. For example, U.S. Pat. No. 5,084,400 to Nath et al. discloses a method of using an activated conversion reagent to alter the physical properties of a top metal electrode layer to make highly resistive the areas of the top metal electrode layer surrounding low resistance current paths of the PV device caused by the surface nonuniformities of the semiconductor layer. Another known method, disclosed by U.S. Pat. No. 4,385,971 to Swartz, involves electrolytically etching or removing the corresponding top metal electrode material surrounding the semiconductor nonuniformity regions. Japanese Patent 60085576 to Fuse discloses a method of anodizing areas of a base metal electrode layer exposed through defects in the semiconductor layer to a non-conductive state prior to the application of the top electrode layer to prevent short circuit paths in the PV cell.
Another known method for minimizing the effects of nonuniformities in PV cells is the application of a barrier layer over a semiconductor surface containing surface nonuniformities. The application of such a barrier layer blocks the undesired electrical contact with the defect areas and minimizes electrical path failures to improve the overall operating efficiency of the PV cell. For example, U.S. Pat. No. 4,598,306 to Nath et al. discloses a continuous transparent barrier layer disposed between the semiconductor region and one of the electrode layers of the PV device. The barrier layer is disposed across the entire surface of the semiconductor and is formed from a specific group of materials designed to increase the resistivity of shunt (low resistance) regions on the semiconductor surface, which limits the flow of current through the short circuit current path of the shunt.
Even in light of the known methods for minimizing the effects of structural nonuniformities in PV cells utilizing thin-film semiconductor devices, there remains a continuing need for a more efficient, less expensive, and longer lasting thin-film semiconductor device. Thus, it would be advantageous to develop an improved method for treating structural nonuniformities in semiconductor devices that modifies the electric potential of localized defect areas within the semiconductor device to create a more uniform distribution of the electric potential generated by the semiconductor device.